Itanium never made it into the consumer-class hardware that was XP’s audience. AFAIK, Intel never even published a roadmap for that to happen!
Maybe a proof of concept they shipped as a demonstration of loyalty to Intel?!
Intel never made Itanium CPUs cheap enough to realistically purchase and Itanium motherboards never became a thing from the top-10 sized Taiwanese motherboard makers (the same companies that were making really nice boards for the 1 GHz to 1.2 GHz socketed Pentium 3 with 512KB cache and the first generations of Pentium 4).
Also the performance sucked. This was before AMD64 existed on the corporate desktop or home desktop.
Supermicro and pretty sure Tyan offered Itanium motherboards.
From what I remember the Itanium was always harped on as too complex and too power hungry for mainstream while offering abysmal x86 emulation which soured its adoption. It had a niche in certain industries like HPC and high reliability. AMD's x64 architecture launched only 2 years after Itanium launched and pretty much destroyed any future for Itanium.
Intel had their foundries and CPU cores paid for by video gamers and receptionists and students typing up their assignments and people looking at porn at 14.4kbps. Servers and workstations were pretty much gravy and every year there was less their systems couldn't do compared to the big iron.
Those computers pretty much sold themselves, contrast with every $20k workstation or $100k server that the unix guys had to explain why they were worth 5x the grey box on the desk.
SGI was struggling to make their MIPS chips and were pretty quickly finished off when nvidia started making GPUs. Itanium originated at HP as a PA-RISC replacement. They owned DEC Alpha when they killed it but arguably DEC didn't have a big base of legacy software at that point. IBM and Sun stood for a lot longer, mainly I would say largely due to locked in customers/data on Oracle and DB2 databases and proprietary software, rather than the merits of their hardware.
If Itanium never happened, 64-bit x86 server chips would have done the same thing to MIPS, Alpha, PA-RISC, SPARC, PowerPC. Might have happened even sooner from Intel since they allegedly sandbagged efforts in that direction to protect Itanium.
That still seems weird to me. If I had to rely on a PC for high-end work in that period, I wanted the server SKU.
EDIT: there was also an additional patch released in May 2020 according to https://en.wikipedia.org/wiki/Windows_Server_2008_R2#Itanium
From what I remember the only drama was that there was a missing pthread_ API implementation on the platform, might have been pthread_gettime or something.
Compared to the HP-UX on PA-RISC box I had access to at the time, the performance was amazing!
Ironically, it died around the time LLMs/AI started becoming good. I feel like the compiler problems with vliw could be solved to a degree with a purpose built ai
I just think the arch has a similarity to archs like cell where it was planned for a world without the end of dennard scaling and just stopped making sense when we weren't targeting scaling to 10Ghz consumer CPUs and beyond.
The relatively fixed clock period that makes sense post ~2006 also means that the CPU architecture of that made the most sense ~2006 (Tomasulo OoO cores) continues to make sense, with most of the process gains going to just making bigger, wider cores.
Combine that with the fact that the hardware development process seems to have been compromised from the start (if you told me the hardware architects never looked at anything other than 30-instruction traces of BLAS kernels, I'd believe you), and the insane hype that was built up for it... it's not surprising that it had an extremely underwhelming launch.
The rise of the web—and databases behind it—as the dominant high-end, high-margin workload obsoleted that assumption.
There’s a great presentation floating around where a Compaq-acquired-DEC engineer is trying to justify how great the OpenVMS port from Alpha to Itanium is going, despite benchmarks showing Alpha smoking Itanium running Apache.
Going by my faulty memory, I'd say it wasn't until Tukwila that it was a clear win over Alpha EV7z. By the time Tukwila arrived, it was pretty clear that Itanium's goose was already cooked.
I worked at an HP shop, and Itanium ran HP/UX so they kept running their business on their PickBASIC (and whatever database that I've forgotten the name of) system
> I said, wait I am sorry to derail this meeting. But how would you use a simulator if you don't have a compiler? He said, well that's true we don't have a compiler yet, so I hand assembled my simulations. I asked "How did you do thousands of line of code that way?" He said “No, I did 30 lines of code”. Flabbergasted, I said, "You're predicting the entire future of this architecture on 30 lines of hand generated code?" [chuckle], I said it just like that, I did not mean to be insulting but I was just thunderstruck. Andy Grove piped up and said "we are not here right now to reconsider the future of this effort, so let’s move on".
https://www.sigmicro.org/media/oralhistories/colwell.pdf
> Davidson also pointed out two areas where academic research could create a blind spot for architecture developers. First, most contemporary academic research ignored CISC architectures, in part due to the appeal of RISC as an architecture that could be taught in a semester-long course. Since graduate students feed the research pipeline, their initial areas of learning frequently define the future research agenda, which remained focused on RISC. Second, VLIW research tended to be driven by instruction traces generated from scientific or numerical applications. These traces are different in two key ways from the average system-wide non-scientific trace: the numerical traces often have more consistent sequential memory access patterns, and the numerical traces often reflect a greater degree of instruction-level parallelism (ILP). Assuming these traces were typical could lead architecture designers to optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue VLIW was driven by the prejudices of a few researchers, rather than by sound technical analysis.
http://courses.cs.washington.edu/courses/csep590/06au/projec...
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https://courses.cs.washington.edu/courses/csep590a/06au/proj...
When the Itanium was developed and introduced (2001), nobody was thinking about general-purpose computations. DirectX 8.0, which introduced Shader Model 1.1 (which was far away from being suitable for GPGPU; Shader Model 1.1 was rather about strongly (also size-)limited programs for the vertex and pixel processing stage), was only introduced in 2000, the first release of CUDA was in 2007, and the first release of OpenCL was in 2009.
The fundamental issue is that there simply doesn't exist enough information to be able to extract the necessary parallelism without a rewrite, its the same issue as trying to autovectorise. You can do it to some degree, but it doesn't work in practice to be able to fill out a very wide architecture with reasonable efficacy
The SIMT programming model has proven to be much more successful vs trying to autovectorise or mash things into a VLIW architecture
For such a long time it became “faster and more cores, don’t be different” and just didn’t seem as interesting.
Apple Silicon had been very interesting to me. I’m really hoping to see a stronger ARM push on Windows, both because I know it can be great and because it’s just interesting. Windows has never had to switch architectures (for consumers) or support two at once for any reasonable population.
Also, whatever happened to mill? We used to get posts about them all the time.
And I wonder what would have happened to Power if they had the 3rd party fabs that exist today instead of being stuck with what IBM could make in-house.
Imagine how much money they could make if that pesky AMD went away.
What?
I think maybe you are confusing Itanium with something else?
Development on itanium stopped in 2013:
> On 31 January 2013 Intel issued an update to their plans for Kittson: it would have the same LGA1248 socket and 32 nm process as Poulson, thus effectively halting any further development of Itanium processors.[1]
It's true that it shipped until 2021, but I think you had to already have previous orders to get that.
At that time, this was starting to become a major issue at the high end of servers and workstations.