The Tech:
- Hardware Binding: Keys are bound to TPM/TEE; signals are signed in a secure environment.
- Jitter Seals: We capture the statistical entropy of the writing process to differentiate human "jitter" from synthetic input.
- Time Hardening: We use sequential VDFs (Verifiable Delay Functions) so that forging a 2-hour session requires 2 hours of computation. No parallelization.
Try it out: brew install writerslogic/tap/witnessd
Or verify any .war certificate at https://writerslogic.com/verifyI'm a novelist and Marine veteran, and I'm currently moving this through the IETF (draft-condrey-rats-pop). I'd love your feedback on the schema and the VDF implementation.