Only concern is the datasheet limit. We tend to have bigger designs than that. Also we're not using KiCAD but maybe it could export.
On EDA tool support, we can work with any tool that exports a netlist. If you can export to .EDIF, it should work out of the box, as this is the format we accept for Altium designs. The schematic visualizer currently supports KiCad only, but we are exploring how to parse full project files from other tools to provide the same visualization and extract additional metadata.
If your team has a formal procurement process, feel free to reach out via the contact email on our site.
Otherwise we probably couldn't put many designs of substance in. Just the data security risk.
I may reach out from my corporate email tomorrow. It's public who I am and where I work but yes we certainly have a formal procurement process.
I'm a software eng now working outside of the tech sphere so not exactly an electronics expert. I know enough to be dangerous but thats about it.
I found Gemini to be pretty great at validating an exported KiCAD netlist against the relevant datasheets with a few caveats.
The RP2350 datasheet in particular was an issue due to its sheer size - bigger than the maximum token limit.
I got around this by extracting the relevant parts of the datasheet myself.
It sounds like you might have this well in hand but worth asking anyway. I assume you've had good experiences testing with MCU datasheets and not just passives / power components?
When it got something wrong it was wrong enough to be noticeable by a non expert and with iterations over the schematic and an incredible amount of time spent learning how to lay stuff out properly, I got a reasonably complex board (double sided, 6 layer, roughly 130 components) produced and fully functional first time.
I'm interested in trying this out on my working design and seeing what it comes up with!
If you can keep this cheap enough for hobby use (or pay as you go for example) and also find a way to validate or check for common layout concerns then that would be incredibly powerful.
It's great to see some genuinely useful use cases for LLM tech that isn't just "we replaced our support people with a shitty chat bot" :)
A schematic is just a representation of a netlist, something where text is more than fine since the graphical form is only for human consumption. An LLM is actually a pretty good fit to cross-reference datasheets and netlists.
Would it be actual PCB layout I would be skeptical as LLMs are quite poor at anything spatial. For schematics however, it could work quite well as a double check.
That said, schematics (as opposed to netlists) don't seem to be a practical I/O format yet. It did generate a KiCad schematic file when asked, but it was pretty bad (penguin on a bicycle level).
Anyway, somehow there does seem to be some electronic tools training happening, becuase I tried this maybe a year ago and it was pretty hopeless.
"Component U1 is 74HCT02, has 14 pins"
"Component R2 is 4.7K resistor, has 2 pins"
"Signal +5V connects U1 pin 14, U2 pin 9, R1 pin 2, R7 pin 1...."
"Signal /RESET connects U1 pin 2, U4 pin 3, U7 pin 8...."
I wish I had some examples to test against this.
Best of luck going forward. This is the kind of tool that could make a difference.
Show HN: An LLM-Powered Tool to Catch PCB Schematic Mistakes - https://news.ycombinator.com/item?id=46080737 - Nov 2025 (29 comments)
Would it be able to detect issues with functionality, and maximum ratings?